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a ad8541/ad8542/ad8544 rev. d information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: 781/326-8703 ? 2004 analog devices, inc. all rights reserved. general-purpose cmos rail-to-rail amplifiers pin configurations features single-supply operation: 2.7 v to 5.5 v low supply current: 45 a/amplifier wide bandwidth: 1 mhz no phase reversal low input currents: 4 pa unity gain stable rail-to-rail input and output applications asic input or output amplifier sensor interface piezo electric transducer amplifier medical instrumentation mobile communication audio output portable systems general description the ad8541/ad8542/ad8544 are single, dual, and quad rail- to-rail input and output single-supply amplifiers featuring very low supply current and 1 mhz bandwidth. all are guaranteed to oper ate from a 2.7 v single su pply as well as a 5 v supply. these parts provide 1 mhz bandwidth at a low current consumption of 45 m a per amplifier. very low input bias currents enable the ad8541/ad8542/ad8544 to be used for integrators, photodiode amplifiers, piezo electric sensors, and other applications with high source impedance. sup- ply current is only 45 m a per amplifier, ideal for battery operation. rail-to-rail inputs and outputs are useful to designers buffering asics in single-supply systems. the ad8541/ad8542/ad8544 are optimized to maintain high gains at lower supply voltages, making them useful for active filters and gain stages. the ad8541/ad8542/ad8544 are specified over the extended industrial temperature range (?0 c to +125 c). the ad8541 is available in 8-lead soic, 5-lead sc70, and 5-lead sot-23 packages. the ad8542 is available in 8-lead soic, 8-lead m sop, and 8-lead tssop surface-mount packages. the ad8544 is available in 14-lead narrow soic and 14-lead tssop surface- mount packages. all msop, sc70, and sot versions are available in tape and reel only. 5-lead sc70 and sot-23 (ks and rt suffixes) 1 2 3 5 4 in a +in a v+ out a ad8541 v 8-lead soic (r suffix) nc ?n a +in a v v+ out a nc nc 1 2 3 4 8 7 6 5 ad8541 nc = no connect 8-lead soic, msop, and tssop (r, rm, and ru suffixes) ad8542 1 2 3 4 8 7 6 5 out a ?n a +in a v +in b ?n b out b v+ 14-lead soic and tssop (r and ru suffixes) ad8544 1 2 3 4 14 13 12 11 out a ?n a +in a v+ v +in d ?n d out d 5 6 7 10 9 8 +in b ?n b out b out c ?n c +in c
e2e rev. d ad8541/ad8542/ad8544especifications electrical characteristics parameter symbol conditions min typ max unit input characteristics offset voltage v os 16 mv e40 r c t a +125 r c7mv input bias current i b 460 pa e40 r c t a +85 r c 100 pa e40 r c t a +125 r c 1,000 pa input offset current i os 0.1 30 pa e40 r c t a +85 r c50pa e40 r c t a +125 r c 500 pa input voltage range 0 2.7 v common-mode rejection ratio cmrr v cm = 0 v to 2.7 v 40 45 db e40 r c t a +125 r c38 db large signal voltage gain a vo r l = 100 k w , v o = 0.5 v to 2.2 v 100 500 v/mv e40 r c t a +85 r c5 0 v/mv e40 r c t a +125 r c2 v/mv offset voltage drift d v os / d t e40 r c t a +125 r c4 m v/ r c bias current drift d i b / d t e40 r c t a +85 r c 100 fa/ r c e40 r c t a +125 r c 2,000 fa/ r c offset current drift d i os / d t e40 r c t a +125 r c25 fa/ r c output characteristics output voltage high v oh i l = 1 ma 2.575 2.65 v e40 r c t a +125 r c 2.550 v output voltage low v ol i l = 1 ma 35 100 mv e40 r c t a + 125 r c 125 mv output current i out v out = v s e 1 v 15 ma i sc 20 ma closed-loop output impedance z out f = 200 khz, a v = 1 50 w power supply power supply rejection ratio psrr v s = 2.5 v to 6 v 65 76 db e40 r c t a + 125 r c60 db supply current/amplifier i sy v o = 0 v 38 55 m a e40 r c t a + 125 r c75 m a dynamic performance slew rate sr r l = 100 k w 0.4 0.75 v/ m s settling time t s to 0.1% (1 v step) 5 m s gain bandwidth product gbp 980 khz phase margin f o6 3 degrees noise performance voltage noise density e n f = 1 khz 40 nv/ hz hz hz hz
e3e rev. d ad8541/ad8542/ad8544 electrical characteristics parameter symbol conditions min typ max unit input characteristics offset voltage v os 16 mv e40 r c t a +125 r c7mv input bias current i b 460 pa e40 r c t a +85 r c 100 pa e40 r c t a +125 r c 1,000 pa input offset current i os 0.1 30 pa e40 r c t a +85 r c50pa e40 r c t a +125 r c 500 pa input voltage range 03v common-mode rejection ratio cmrr v cm = 0 v to 3 v 40 45 db e40 r c t a +125 r c38 db large signal voltage gain a vo r l = 100 k w , v o = 0.5 v to 2.2 v 100 500 v/mv e40 r c t a +85 r c5 0 v/mv e40 r c t a +125 r c2 v/mv offset voltage drift d v os / d t e40 r c t a +125 r c4 m v/ r c bias current drift d i b / d t e40 r c t a +85 r c 100 fa/ r c e40 r c t a +125 r c 2,000 fa/ r c offset current drift d i os / d t e40 r c t a +125 r c25 fa/ r c output characteristics output voltage high v oh i l = 1 ma 2.875 2.955 v e40 r c t a +125 r c 2.850 v output voltage low v ol i l = 1 ma 32 100 mv e40 r c t a +125 r c 125 mv output current i out v out = v s e 1 v 18 ma i sc 25 ma closed-loop output impedance z out f = 200 khz, a v = 1 50 w power supply power supply rejection ratio psrr v s = 2.5 v to 6 v 65 76 db e40 r c t a +125 r c60 db supply current/amplifier i sy v o = 0 v 40 60 m a e40 r c t a +125 r c75 m a dynamic performance slew rate sr r l = 100 k w 0.4 0.8 v/ m s settling time t s to 0.01% (1 v step) 5 m s gain bandwidth product gbp 980 khz phase margin f o6 4 degrees noise performance voltage noise density e n f = 1 khz 42 nv/ hz hz hz hz
e4e rev. d ad8541/ad8542/ad8544especifications electrical characteristics parameter symbol conditions min typ max unit input characteristics offset voltage v os 16 mv e40 r c t a +125 r c7mv input bias current i b 460 pa e40 r c t a +85 r c 100 pa e40 r c t a +125 r c 1,000 pa input offset current i os 0.1 30 pa e40 r c t a +85 r c50pa e40 r c t a +125 r c 500 pa input voltage range 0 5v common-mode rejection ratio cmrr v cm = 0 v to 5 v 40 48 db e40 r c t a + 125 r c38 db large signal voltage gain a vo r l = 100 k w , v o = 0.5 v to 2.2 v 20 40 v/mv e40 r c t a +85 r c1 0 v/mv e40 r c t a +125 r c2 v/mv offset voltage drift d v os / d t e40 r c t a +125 r c4 m v/ r c bias current drift d i b / d t e40 r c t a +85 r c 100 fa/ r c e40 r c t a +125 r c 2,000 fa/ r c offset current drift d i os / d t e40 r c t a +125 r c25 fa/ r c output characteristics output voltage high v oh i l = 1 ma 4.9 4.965 v e40 r c t a +125 r c 4.875 v output voltage low v ol i l = 1 ma 25 100 mv e40 r c t a +125 r c 125 mv output current i out v out = v s e 1 v 30 ma i sc 60 ma closed-loop output impedance z out f = 200 khz, a v = 1 45 w power supply power supply rejection ratio psrr v s = 2.5 v to 6 v 65 76 db e40 r c t a +125 r c60 db supply current/amplifier i sy v o = 0 v 45 65 m a e40 r c t a +125 r c85 m a dynamic performance slew rate sr r l = 100 k w , c l = 200 pf 0.45 0.92 v/ m s full-power bandwidth bw p 1% distortion 70 khz settling time t s to 0.1% (1 v step) 6 m s gain bandwidth product gbp 1,000 khz phase margin f o6 7 degrees noise performance voltage noise density e n f = 1 khz 42 nv/ hz hz hz hz
ad8541/ad8542/ad8544 e5e rev. d absolute maximum ratings 1 supply voltage (v s ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 v input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . gnd to v s differential input voltage 2 . . . . . . . . . . . . . . . . . . . . . . . 6 v storage temperature range . . . . . . . . . . . . e65 r c to +150 r c operating temperature range . . . . . . . . . . e40 r c to +125 r c junction temperature range . . . . . . . . . . . . e65 r c to +150 r c lead temperature range (soldering, 60 sec) . . . . . . . 300 r c notes 1 stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 for supplies less than 6 v, the differential input voltage is equal to v s . ordering guide temperature package package branding model range description option information AD8541AKS-R2 e40 r c to +125 r c 5-lead sc70 ks-5 a4b ad8541aks-reel7 e40 r c to +125 r c 5-lead sc70 ks-5 a4b ad8541aksz-reel7 * e40 r c to +125 r c 5-lead sc70 ks-5 a4b ad8541ar e40 r c to +125 r c 8-lead soic r-8 ad8541ar-reel e40 r c to +125 r c 8-lead soic r-8 ad8541ar-reel7 e40 r c to +125 r c 8-lead soic r-8 ad8541art-r2 e40 r c to +125 r c 5-lead sot-23 rt-5 a4a ad8541art-reel e40 r c to +125 r c 5-lead sot-23 rt-5 a4a ad8541art-reel7 e40 r c to +125 r c 5-lead sot-23 rt-5 a4a ad8541artz-reel * e40 r c to +125 r c 5-lead sot-23 rt-5 a4a ad8541artz-reel7 * e40 r c to +125 r c 5-lead sot-23 rt-5 a4a ad8542ar e40 r c to +125 r c 8-lead soic r-8 ad8542ar-reel e40 r c to +125 r c 8-lead soic r-8 ad8542ar-reel7 e40 r c to +125 r c 8-lead soic r-8 ad8542arz * e40 r c to +125 r c 8-lead soic r-8 ad8542arz-reel * e40 r c to +125 r c 8-lead soic r-8 ad8542arz-reel7 * e40 r c to +125 r c 8-lead soic r-8 ad8542arm-r2 e40 r c to +125 r c 8-lead msop rm-8 ava ad8542arm-reel e40 r c to +125 r c 8-lead msop rm-8 ava ad8542aru e40 r c to +125 r c 8-lead tssop ru-8 ad8542aru-reel e40 r c to +125 r c 8-lead tssop ru-8 ad8542aruz * e40 r c to +125 r c 8-lead tssop ru-8 ad8542aruz-reel * e40 r c to +125 r c 8-lead tssop ru-8 ad8544ar e40 r c to +125 r c 14-lead soic r-14 ad8544ar-reel e40 r c to +125 r c 14-lead soic r-14 ad8544ar-reel7 e40 r c to +125 r c 14-lead soic r-14 ad8544arz * e40 r c to +125 r c 14-lead soic r-14 ad8544arz-reel * e40 r c to +125 r c 14-lead soic r-14 ad8544arz-reel7 * e40 r c to +125 r c 14-lead soic r-14 ad8544aru e40 r c to +125 r c 14-lead tssop ru-14 ad8544aru-reel e40 r c to +125 r c 14-lead tssop ru-14 ad8544aruz * e40 r c to +125 r c 14-lead tssop ru-14 ad8544aruz-reel * e40 r c to +125 r c 14-lead tssop ru-14 * z = pb-free part. esd caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the ad8541/ad8542/ad8544 feature proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. warning! esd sensitive device package information package type ja * jc unit 5-lead sc70 (ks) 376 126 r c/w 5-lead sot-23 (rt) 230 146 r c/w 8-lead soic (r) 158 43 r c/w 8-lead msop (rm) 210 45 r c/w 8-lead tssop (ru) 240 43 r c/w 14-lead soic (r) 120 36 r c/w 14-lead tssop (ru) 240 43 r c/w * q ja is specified for worst-case conditions, i.e., ja is specified for device soldered onto a circuit board for surface mount packages.
ad8541/ad8542/ad8544 e6e rev. d common-mode voltage e v 0.5 0.5 5.5 1.5 2.5 3.5 4.5 input bias current e pa 9 8 0 4 3 2 1 7 5 6 v s = 2.7v and 5v v cm = v s /2 tpc 3. input bias current vs. common-mode voltage frequency e hz power supply rejection e db 100 1k 10m 10k 100k 1m 160 140 40 120 100 80 60 40 20 0 20 v s = 2.7v t a = 25 c +psrr psrr tpc 6. power supply rejection ratio vs. frequency capacitance e pf small signal overshoot e % 60 0 10 100 10k 1k 30 20 10 40 v s = 2.7v r l = t a = 25 c 50 +os os tpc 9. small signal overshoot vs. load capacitance input offset voltage e mv 4.5 3.5 4.5 2.5 1.5 0.5 1.5 2.5 3.5 0.5 number of amplifiers 180 160 0 80 60 40 20 140 100 120 v s = 5v v cm = 2.5v t a = 25 c tpc 1. input offset voltage distribution temperature e c input bias current e pa 400 0 40 20 140 02040 8 0 100 120 60 350 200 150 100 50 300 250 v s = 2.7v and 5v v cm = v s /2 tpc 4. input bias current vs. temperature load current e ma output voltage e mv 10k 100 0.01 0.001 0.01 100 0.1 1 10 1 sink 0.1 10 v s = 2.7v t a = 25 c 1k source tpc 7. output voltage to supply rail vs. load current temperature e c input offset voltage e mv 1.0 2.5 4.0 55 35 15 52545658 5 105 125 0.5 2.0 3.0 3.5 1.0 1.5 0.0 0.5 v s = 2.7v and 5v v cm = v s /2 145 tpc 2. input offset voltage vs. temperature temperature e c input offset current e pa 7 1 55 35 145 15 25 85 105 125 65 6 3 2 1 0 5 4 v s = 2.7v and 5v v cm = v s /2 545 tpc 5. input offset current vs. temperature frequency e hz output swing e v p-p 3.0 2.5 0 1k 10k 10m 100k 1m 2.0 1.5 0.5 1.0 v s = 2.7v v in = 2.5v p-p r l = 2k t a = 25 c tpc 8. closed-loop output voltage swing vs. frequency etypical performance characteristics
ad8541/ad8542/ad8544 e7e rev. d capacitance e p f small signal overshoot e % 60 0 10 100 10k 1k 30 20 10 40 v s = 2.7v r l = 10k t a = 25 c 50 +os os tpc 10. small signal overshoot vs. load capacitance 500mv 10 s 1.35v v s = 2.7v r l = 2k a v = 1 t a = 25 c tpc 13. large signal transient response frequency e hz common-mode rejection e db 1k 10k 10m 100k 1m 60 50 40 30 20 v s = 5v t a = 25 c 10 0 10 70 80 90 tpc 16. common-mode rejection ratio vs. frequency capacitance e p f small signal overshoot e % 60 0 10 100 10k 1k 30 20 10 40 v s = 2.7v r l = 2k t a = 25 c 50 +os os tpc 11. small signal overshoot vs. load capacitance frequency e hz gain e db 1k 10k 10m 100k 1m 80 60 40 20 0 45 90 135 180 phase shift e degrees v s = 2.7v r l = no load t a = 25 c tpc 14. open-loop gain and phase vs. frequency load current e ma output voltage e mv 10k 100 0.01 0.001 0.01 100 0.1 1 10 1 sink 0.1 10 v s = 5v t a = 25 c 1k source tpc 17. output voltage to supply rail vs. frequency 50mv 10 s 1.35v v s = 2.7v r l = 100kv c l = 300pf a v = 1 t a = 25 c tpc 12. small signal transient response frequency e hz power supply rejection ratio e db 100 1k 10m 10k 100k 1m 160 140 40 120 100 80 60 40 20 0 20 v s = 5v t a = 25 c +psrr psrr tpc 15. power supply rejection ratio vs. frequency frequency e hz output swing e v p-p 3.0 2.5 0 1k 10k 10m 100k 1m 2.0 1.5 0.5 1.0 v s = 5v v in = 4.9v p-p r l = no load t a = 25 c 4.0 3.5 5.0 4.5 tpc 18. closed-loop output voltage swing vs. frequency
ad8541/ad8542/ad8544 e8e rev. d capacitance e pf small signal overshoot e % 60 0 10 100 10k 1k 30 20 10 40 v s = 5v r l = 10k t a = 25 c 50 +os os tpc 20. small signal overshoot vs. load capacitance 50mv 10 s 2.5v v s = 5v r l = 100k c l = 300pf a v = 1 t a = 25 c tpc 23. small signal transient response 1v 20 s 2.5v v s = 5v r l = 10k a v = 1 t a = 25 c v out v in tpc 26. no phase reversal capacitance e pf small signal overshoot e % 60 0 10 100 10k 1k 30 20 10 40 v s = 5v r l = 2k t a = 25 c 50 +os os tpc 21. small signal overshoot vs. load capacitance 1v 10 s 2.5v v s = 5v r l = 2k a v = 1 t a = 25 c tpc 24. large signal transient response supply voltage e v supply current/amplifier e a 60 0 01 6 23 45 50 40 30 20 10 t a = 25 c tpc 27. supply current per amplifier vs. supply voltage frequency e hz output swing e v p-p 3.0 2.5 0 1k 10k 10m 100k 1m 2.0 1.5 0.5 1.0 v s = 5v v in = 4.9v p-p r l = 2k t a = 25 c 4.0 3.5 5.0 4.5 tpc 19. closed-loop output voltage swing vs. frequency capacitance e pf small signal overshoot e % 60 0 10 100 10k 1k 30 20 10 40 v s = 5v r l = t a = 25 c 50 +os os tpc 22. small signal overshoot vs. load capacitance frequency e hz gain e db 1k 10k 10m 100k 1m 80 60 40 20 0 v s = 5v r l = no load t a = 25 c 45 90 135 180 phase shift e de g rees tpc 25. open-loop gain and phase vs. frequency
ad8541/ad8542/ad8544 e9e rev. d frequency e khz 200mv/division 05 25 10 15 20 v s = 5v a v = 1 marker set @ 10khz marker reading: 37.6 v/ hz t a = 25 c tpc 30. voltage noise frequency e hz impedance e 1k 10k 100m 100k 1m 10m 1,000 900 0 800 700 600 500 400 300 200 100 v s = 2.7v and 5v a v = 1 t a = 25 c tpc 29. closed-loop output impedance vs. frequency notes on the ad854x amplifiers the ad8541/ad8542/ad8544 amplifiers are improved perfor- mance general-purpose operational amplifiers. performance has been improved over previous amplifiers in several ways. lower supply current for 1 mhz gain bandwidth the ad854x series typically uses 45 m a of current per amplifier. this is much less than the 200 m a to 700 m a used in earlier generation parts with similar performance. this makes the ad854x series a good choice for upgrading portable designs for longer battery life. alternatively, additional functions and per- formance can be added at the same current drain. higher output current at 5 v single supply, the short-circuit current is typically 60 m a. even 1 v from the supply rail, the ad854x amplifiers can provide 30 ma, sourcing or sinking. sou rcing and sinkin g are str ong at lower voltages, with 15 ma available at 2.7 v and 18 ma at 3.0 v. for even higher output curre nts, please see the analog devices a d8531/ad8532/ad8534 parts, with output currents to 250 ma. information on these p arts is available from your analog devices representative, and data sheets are available at the analog devices website at www.analog.com. better performance at lower voltages the ad854x family of parts has been designed to provide better ac performance, at 3.0 v and 2.7 v, than previously available parts. typical gain-bandwidth product is close to 1 mhz at 2.7 v. voltage gain at 2.7 v and 3.0 v is typically 500,000. phase margin is typically over 60 r c, making the part easy to use. applications notch filter the ad8542 has very high open-loop gain (especially with a supply voltage below 4 v), which makes it useful for active filters of all types. for example, figure 1 illustrates the ad8542 in the classic twin-t notch filter design. the twin-t notch is desired for simplicity, low output impedance, and minimal use of op amps. in fact, this notch filter may be designed with only one op amp if q adjustment is not required. simply remove u2 as illus- trated in figure 2. however, a major drawback to this circuit topology is ensuring that all the rs and cs closely match. the components must closely match or notch frequency offset and drift will cause the circuit to no longer attenuate at the ideal notch frequency. to achieve desired performance, 1% or better component tolerances or special component screens are usually required. one method to desensitize the circuit- to-component mismatch is to increase r2 with respect to r1, which lowers q. a lower q increases attenuation over a wider frequency range but reduces attenuation at the peak notch frequency. 1/2 ad8542 [ ] 4 1 r1 r1+r2 1 2 p rc c 26.7nf r1 97.5k c2 53.6 f r/2 50k r2 2.5k r 100k r 100k 5 6 7 8 3 2 v out 4 1 1/2 ad8542 5.0v 2.5v ref c 26.7nf 2.5v ref f 0 = 1 f 0 = u2 u1 figure 1. 60 hz twin-t notch filter, q = 10 c 2c r/2 r r 7 3 2 v out 4 6 ad8541 5.0v 2.5v ref c v in figure 2. 60 hz twin-t notch filter, q = ? (ideal) figure 3 shows a nother example of the ad8542 in a notch filter circuit. the fndr notch filter has fewer critical matching requirements than the twin-t notch and for the f ndr q is directly proportional to a single resistor r1. while matching component values is still important, it is also temperature e c supply current/amplifier e a 55 20 55 35 145 15 52545658 5 105 125 50 45 40 35 30 25 v s = 5v v s = 2.7v tpc 28. supply current per amplifier vs. temperature
ad8541/ad8542/ad8544 e10e rev. d much easier and/or less expensive to accomplish in the fndr circuit. for example, the twin-t n otch uses three capacitors with two unique values, whereas the fndr circuit uses only two capacitors, which may be of the same value. u3 is simply a buffer that is added to lower the output impedance of the circuit. 4 f = r 2 c2 l = c2 1 f 1/4 ad8544 11 6 1/4 ad8544 1/4 ad8544 10 8 9 c1 1 f 1 2 p lc1 r 2.61k r1 q adjust 200 v out 2.5v ref 2 1 3 1/4 ad8544 r 2.61k 12 14 13 nc 2.5v ref spare 5 7 r 2.61k r 2.61k 2.5v ref u3 u2 u1 u4 figure 3. fndr 60 hz notch filter with output buffer comparator function a comparator function is a common application for a spare op amp in a quad package. figure 4 illustrates 1/4 of the ad8544 as a comparator in a standard overload detection application. unlike many op amps, the ad854x family can double as comparators because this op amp family has rail-to-rail differential input range, rail-to-rail output, and a great speed versus power ratio. r2 is used to introduce hysteresis. the ad854x, when used as comparators, have 5 m s propagation delay at 5 v and 5 m s overload recovery time. r1 1k v out 2.5v ref v in 1/4 ad8544 2.5v dc r2 1m figure 4. ad854x comparator applicationeoverload detector photodiode application the ad854x family has very high impedance with input bias current typically around 4 pa. this characteristic allows the ad854x op amps to be used in photodiode applications and other applications that require high input impedance. note that the ad854x has significant voltage offset, which can be removed by capacitive coupling or software calibration. figure 5 illustrates a photodiode or current measurement application. the feedback resistor is limited to 10 m w to avoid excessive output offset. also, note that a resistor is not needed on the noninverting input to cancel bias current offset because the bias current related output offset is not significant when compared to the voltage offset contribution. for the best performance follow the standard high impedance layout tech niques including: y shield the circuit. y clean the circuit board. y put a trace connected to the noninverting input around the inverting input. y use separate analog and digital power supplies. ad8541 4 6 7 3 2 v out 2.5v ref r 10m c 100pf d 2.5v ref or v+ figure 5. high input impedance applicationephotodiode amplifier
ad8541/ad8542/ad8544 e11e rev. d * ad8542 spice macro-model typical values * 6/98, ver. 1 * tam / adsc * * copyright 1998 by analog devices * * refer to ?readme.doc? file for license * statement. use of this model indicates your * acceptance of the terms and provisions in * the license statement. * * node assignments * noninverting input *| inverting input * || positive supply * || | negative supply * || | | output * || | | | * || | | | .subckt ad8542 1 2 99 50 45 * * input stage * m1 4 1 8 8 pix l=0.6e-6 w=16e-6 m2 6 7 8 8 pix l=0.6e-6 w=16e-6 m3 11 1 10 10 nix l=0.6e-6 w=16e-6 m4 12 7 10 10 nix l=0.6e-6 w=16e-6 rc1 4 50 20e3 rc2 6 50 20e3 rc3 99 11 20e3 rc4 99 12 20e3 c1 4 6 1.5e-12 c2 11 12 1.5e-12 i1 99 8 1e-5 i2 10 50 1e-5 v1 99 9 0.2 v2 13 50 0.2 d1 8 9 dx d2 13 10 dx eos 7 2 poly(3) (22,98) (73,98) (81,0) 1e-3 1 1 1 ios 1 2 2.5e-12 * * cmrr 64db, zero at 20khz * ecm1 21 98 poly(2) (1,98) (2,98) 0 .5 .5 rcm1 21 22 79.6e3 ccm1 21 22 100e-12 rcm2 22 98 50 * * psrr=90db, zero at 200hz * rps1 70 0 1e6 rps2 71 0 1e6 cps1 99 70 1e-5 cps2 50 71 1e-5 epsy 98 72 poly(2) (70,0) (0,71) 0 1 1 rps3 72 73 1.59e6 cps3 72 73 500e-12 rps4 73 98 25 * * voltage noise reference of 35nv/rt(hz) * vn1 80 0 0 rn1 80 0 16.45e-3 hn 81 0 vn1 35 rn2 81 0 1 * * internal voltage reference * vfix 90 98 dc 1 s1 90 91 (50,99) vsy_switch vsn1 91 92 dc 0 rsy 92 98 1e3 eref 98 0 poly(2) (99,0) (50,0) 0 .5 .5 gsy 99 50 poly(1) (99,50) 0 3.7e-6 * * adaptive gain stage * at vsy>+4.2, avol=45 v/mv * at vsy<+3.8, avol=450 v/mv * g1 98 30 poly(2) (4,6) (11,12) 0 2.5e-5 2.5e-5 vr1 30 31 dc 0 h1 31 98 poly(2) vr1 vsn1 0 5.45e6 0 0 49.05e9 cf 45 30 10e-12 d3 30 99 dx d4 50 30 dx * * output stage * m5 45 46 99 99 pox l=0.6e-6 w=375e-6 m6 45 47 50 50 nox l=0.6e-6 w=500e-6 eg1 99 46 poly(1) (98,30) 1.05 1 eg2 47 50 poly(1) (30,98) 1.04 1 * * models * .model pox pmos (level=2,kp=20e-6,vto=- +1,lambda=0.067) .model nox nmos (level=2,kp=20e- +6,vto=1,lambda=0.067) .model pix pmos (level=2,kp=20e-6,vto=- +0.7,lambda=0.01,kf=1e-31) .model nix nmos (level=2,kp=20e- +6,vto=0.7,lambda=0.01,kf=1e-31) .model dx d(is=1e-14) .model vsy_switch vswitch(roff=100e3,ron=1,voff=- +4.2,von=-3.5) .ends ad8542
ad8541/ad8542/ad8544 e12e rev. d outline dimensions 8-lead thin shrink small outline package [tssop] (ru-8) dimensions shown in millimeters 8 5 4 1 pin 1 0.65 bsc seating plane 0.15 0.05 0.30 0.19 1.20 max 0.20 0.09 8 0 6.40 bsc 0.75 0.60 0.45 4.50 4.40 4.30 3.10 3.00 2.90 coplanarity 0.10 compliant to jedec standards mo-153aa 14-lead thin shrink small outline package [tssop] (ru-14) dimensions shown in millimeters 4.50 4.40 4.30 14 8 7 1 6.40 bsc pin 1 5.10 5.00 4.90 0.65 bsc seating plane 0.15 0.05 0.30 0.19 1.20 max 1.05 1.00 0.80 0.20 0.09 8 0 0.75 0.60 0.45 compliant to jedec standards mo-153ab-1 coplanarity 0.10 8-lead standard small outline package [soic] narrow body (r-8) dimensions shown in millimeters and (inches) 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 85 4 1 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2440) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design compliant to jedec standards ms-012aa 14-lead standard small outline package [soic] narrow body (r-14) dimensions shown in millimeters and (inches) controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design coplanarity 0.10 14 8 7 1 6.20 (0.2441) 5.80 (0.2283) 4.00 (0.1575) 3.80 (0.1496) 8.75 (0.3445) 8.55 (0.3366) 1.27 (0.0500) bsc seating plane 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) 8 0 0.50 (0.0197) 0.25 (0.0098) 45 1.27 (0.0500) 0.40 (0.0157) 0.25 (0.0098) 0.17 (0.0067) compliant to jedec standards ms-012ab
ad8541/ad8542/ad8544 e13e rev. d 5-lead small outline transistor package [sot-23] (rt-5) dimensions shown in millimeters pin 1 1.60 bsc 2.80 bsc 1.90 bsc 0.95 bsc 1 3 4 5 2 0.22 0.08 10 5 0 0.50 0.30 0.15 max seating plane 1.45 max 1.30 1.15 0.90 2.90 bsc 0.60 0.45 0.30 compliant to jedec standards mo-178aa 8-lead mini small outline package [msop] (rm-8) dimensions shown in millimeters 0.80 0.60 0.40 8 0 85 4 1 4.90 bsc pin 1 0.65 bsc 3.00 bsc seating plane 0.15 0.00 0.38 0.22 1.10 max 3.00 bsc coplanarity 0.10 0.23 0.08 compliant to jedec standards mo-187aa 5-lead thin shrink small outline transistor package [sc70] (ks-5) dimensions shown in millimeters 0.30 0.15 1.00 0.90 0.70 seating plane 1.10 max 0.22 0.08 0.46 0.36 0.26 3 5 4 1 2 2.00 bsc pin 1 2.10 bsc 0.65 bsc 1.25 bsc 0.10 max 0.10 coplanarity compliant to jedec standards mo-203aa outline dimensions
ad8541/ad8542/ad8544 e14e rev. d revision history location page 8/04?data sheet changed from rev. c to rev. d. changes to ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 change to figure 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 updated outline dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 1/03?data sheet changed from rev. b to rev. c. updated format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . universal change to general description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 changes to ordering guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 changes to outline dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
e15e
e16e c00935e0e8/04(d)

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